Desain VHDL Sistem Pengirim Data Serial Asinkron 8 Bit

Abstract:

In this paper, reported the result of the design of eight bit asinkron serial data sender system is built from digital connection is the control conection or combination connection, counter connection, register and multiplexer.

In this design system, uses ASM method as the first step is doing verification with VHDL tools from altera maxplus 9.5. The result of simulation is shown in picture 8 and 9 is suitable with the design using ASM.

Keyword: Pengirim Data Serial, ASM, VHDL 

Oleh : Titiek Suheta, Arief Budijanto 

Institut Teknologi Adhi Tama Surabaya

Edisi : Volume 7 No 2, Agustus 2006